155 lines
5.9 KiB
C
155 lines
5.9 KiB
C
/** @file
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Header file for SA SMM Handler
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@copyright
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INTEL CONFIDENTIAL
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Copyright 2012 - 2019 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains an 'Intel Peripheral Driver' and is uniquely identified as
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"Intel Reference Module" and is licensed for Intel CPUs and chipsets under
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the terms of your license agreement with Intel or your vendor. This file may
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be modified by the user, subject to additional terms of the license agreement.
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@par Specification Reference:
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**/
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#ifndef _SaLateInitSmm_H_
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#define _SaLateInitSmm_H_
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///
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/// Driver Consumed Protocol Prototypes
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///
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#include <Protocol/SmmBase2.h>
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#include <Protocol/SmmSxDispatch2.h>
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#include <Protocol/SmmIoTrapDispatch2.h>
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#include <Protocol/SaPolicy.h>
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#include <Library/S3BootScriptLib.h>
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#include <CpuPcieConfig.h>
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#include <Library/CpuPcieInfoFruLib.h>
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extern EFI_SMM_IO_TRAP_DISPATCH2_PROTOCOL *mPchIoTrap;
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extern EFI_SMM_SX_DISPATCH2_PROTOCOL *mSxDispatch;
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#define MAX_SUPPORTED_DEVICE_NUMBER 192
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#define MAX_PAM_REG_COUNT 7
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#define PAM_REG_BASE 0x80
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///
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/// The value before AutoConfig match the setting of PCI Express Base Specification 1.1, please be careful for adding new feature
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///
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typedef enum {
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PcieAspmDisabled,
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PcieAspmL0s,
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PcieAspmL1,
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PcieAspmL0sL1,
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PcieAspmAutoConfig,
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PcieAspmMax
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} CPU_PCIE_ASPM_CONFIG;
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typedef struct {
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UINT64 Address;
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S3_BOOT_SCRIPT_LIB_WIDTH Width;
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UINT32 Value;
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} BOOT_SCRIPT_PCI_REGISTER_SAVE;
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/**
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<b>System Agent Initialization SMM Driver Entry Point</b>
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- <b>Introduction</b> \n
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This is an optional driver to support PCIe ASPM initialization later than Option ROM initialization.\n
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In this scenario S3 Save Boot Script table has been closed per security consideration so the ASPM settings will be stored in SMM memory and restored during S3 resume.
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If platform does not support this scenario this driver can be excluded and SI_SA_POLICY_PPI -> PCIE_CONFIG -> InitPcieAspmAfterOprom must be set to FALSE. \n
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Note: When InitPcieAspmAfterOprom enabled, the SMI callback handler must be registered successfully, otherwise it will halt the system.
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- @pre
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- _EFI_SMM_BASE_PROTOCOL (or _EFI_SMM_BASE2_PROTOCOL for EDK2): Provides SMM infrastructure services.
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- _EFI_SMM_IO_TRAP_DISPATCH_PROTOCOL (or _EFI_SMM_IO_TRAP_DISPATCH2_PROTOCOL for EDK2): Interface structure for the SMM IO trap specific SMI Dispatch Protocol
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- SA_POLICY_PROTOCOL: A protocol published by a platform DXE module executed earlier; this is documented in this document as well.
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- @result
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PCIe ASPM has been initialized on all end point devices discovered and same settings will be restored during S3 resume.
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@param[in] ImageHandle - The image handle of Wake On Lan driver
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@param[in] SystemTable - The standard EFI system table
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@retval EFI_SUCCESS - SA SMM handler was installed or not necessary
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@retval EFI_NOT_FOUND - Fail to register SMI callback or required protocol/hob missing.
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**/
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EFI_STATUS
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EFIAPI
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SaLateInitSmmEntryPoint (
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IN EFI_HANDLE ImageHandle,
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IN EFI_SYSTEM_TABLE *SystemTable
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);
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/**
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An IoTrap callback to config PCIE power management settings
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@param[in] DispatchHandle - The handle of this callback, obtained when registering
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@param[in] DispatchContext - Pointer to the EFI_SMM_IO_TRAP_DISPATCH_CALLBACK_CONTEXT
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**/
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VOID
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EFIAPI
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CpuPcieIoTrapSmiCallback(
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IN EFI_HANDLE DispatchHandle,
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IN EFI_SMM_IO_TRAP_CONTEXT *CallbackContext,
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IN OUT VOID *CommBuffer,
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IN OUT UINTN *CommBufferSize
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);
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/**
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This function is used to set or clear flags at S3 entry
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Clear the Io trap executed flag before enter S3
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@param[in] Handle Handle of the callback
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@param[in] Context The dispatch context
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@param[in,out] CommBuffer A pointer to a collection of data in memory that will be conveyed from a non-SMM environment into an SMM environment.
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@param[in,out] CommBufferSize The size of the CommBuffer.
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@retval EFI_SUCCESS SA register saved
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**/
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EFI_STATUS
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EFIAPI
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CpuPcieS3EntryCallBack (
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IN EFI_HANDLE Handle,
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IN CONST VOID *Context OPTIONAL,
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IN OUT VOID *CommBuffer OPTIONAL,
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IN OUT UINTN *CommBufferSize OPTIONAL
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);
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/**
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Register PCIE Hotplug SMI dispatch function to handle Hotplug enabling
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@param[in] ImageHandle The image handle of this module
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@param[in] SystemTable The EFI System Table
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@retval EFI_SUCCESS The function completes successfully
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**/
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EFI_STATUS
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EFIAPI
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InitializeCpuPcieSmm (
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IN EFI_HANDLE ImageHandle,
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IN EFI_SYSTEM_TABLE *SystemTable
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);
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#endif
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