1042 lines
30 KiB
C
1042 lines
30 KiB
C
/** @file
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;******************************************************************************
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;* Copyright (c) 2012 - 2020, Insyde Software Corp. All Rights Reserved.
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;*
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;* You may not reproduce, distribute, publish, display, perform, modify, adapt,
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;* transmit, broadcast, present, recite, release, license or otherwise exploit
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;* any part of this publication in any form, by any means, without the prior
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;* written permission of Insyde Software Corporation.
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;*
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;******************************************************************************
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*/
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/**@file
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PCH Setup Routines.
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@copyright
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INTEL CONFIDENTIAL
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Copyright 2010 - 2021 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains a 'Sample Driver' and is licensed as such under the terms
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of your license agreement with Intel or your vendor. This file may be modified
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by the user, subject to the additional terms of the license agreement.
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@par Specification Reference:
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**/
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#include <Protocol/DevicePath.h>
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#include <Protocol/DiskInfo.h>
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#include <Protocol/IdeControllerInit.h>
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//[-start-200215-IB06462109-remove]//
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//#include <SetupPrivate.h>
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//[-end-200215-IB06462109-remove]//
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#include "PlatformBoardId.h"
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#include <Library/SiFviLib.h>
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#include "OemSetup.h"
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#include <Library/GbeLib.h>
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#include <Library/TsnLib.h>
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#include <Library/PchInfoLib.h>
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#include <Library/SataSocLib.h>
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#include <Library/PciSegmentLib.h>
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#include <Library/GpioLib.h>
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#include <Library/GpioNativeLib.h>
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#include <Library/SpiAccessLib.h>
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#include <Library/IshInfoLib.h>
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#include <Library/PchPciBdfLib.h>
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//[-start-200215-IB06462109-remove]//
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//#include <Protocol/Spi.h>
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//#include <Protocol/Smbios.h>
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//[-end-200215-IB06462109-remove]//
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#include <Library/CpuPlatformLib.h>
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#include <Library/PchPciBdfLib.h>
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#include <PchInfoHob.h>
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#include <ChipsetInfoHob.h>
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#include <PcieRegs.h>
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#include <Register/PchRegs.h>
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#include <Register/PchPcieRpRegs.h>
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#include <PchPcieRpInfo.h>
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#include <Register/FlashRegs.h>
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#include <Register/FlashRegsVer2.h>
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//[-start-200215-IB06462109-add]//
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#include <Protocol/PciIo.h>
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#include <PlatformInfo.h>
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//[-end-200215-IB06462109-add]//
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//
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// Print primitives
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//
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#define LEFT_JUSTIFY 0x01
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#define PREFIX_SIGN 0x02
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#define PREFIX_BLANK 0x04
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#define COMMA_TYPE 0x08
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#define LONG_TYPE 0x10
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#define PREFIX_ZERO 0x20
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#define DXE_DEVICE_DISABLED 0
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#define DXE_DEVICE_ENABLED 1
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//
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// Length of temp string buffer to store value string.
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//
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#define CHARACTER_NUMBER_FOR_VALUE 30
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#define _48_BIT_ADDRESS_FEATURE_SET_SUPPORTED 0x0400
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#define ATAPI_DEVICE 0x8000
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typedef enum {
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EfiCompatibility,
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EfiEnhancedMode
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} EFI_SATA_MODE;
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GLOBAL_REMOVE_IF_UNREFERENCED EFI_STRING_ID gSATA[8] = {
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STRING_TOKEN(STR_SATA0_NAME),
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STRING_TOKEN(STR_SATA1_NAME),
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STRING_TOKEN(STR_SATA2_NAME),
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STRING_TOKEN(STR_SATA3_NAME),
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STRING_TOKEN(STR_SATA4_NAME),
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STRING_TOKEN(STR_SATA5_NAME),
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STRING_TOKEN(STR_SATA6_NAME),
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STRING_TOKEN(STR_SATA7_NAME)
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};
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GLOBAL_REMOVE_IF_UNREFERENCED EFI_STRING_ID gSOFTPRES[8] = {
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STRING_TOKEN(STR_SATA0_SOFT_PRESERVE_STATUS),
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STRING_TOKEN(STR_SATA1_SOFT_PRESERVE_STATUS),
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STRING_TOKEN(STR_SATA2_SOFT_PRESERVE_STATUS),
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STRING_TOKEN(STR_SATA3_SOFT_PRESERVE_STATUS),
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STRING_TOKEN(STR_SATA4_SOFT_PRESERVE_STATUS),
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STRING_TOKEN(STR_SATA5_SOFT_PRESERVE_STATUS),
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STRING_TOKEN(STR_SATA6_SOFT_PRESERVE_STATUS),
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STRING_TOKEN(STR_SATA7_SOFT_PRESERVE_STATUS)
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};
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GLOBAL_REMOVE_IF_UNREFERENCED BOOLEAN SataControllerConnected = FALSE;
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VOID SwapEntries (
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IN CHAR8 *Data,
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IN UINT16 Size
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)
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{
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UINT16 Index;
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CHAR8 Temp8;
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for (Index = 0; (Index+1) < Size; Index+=2) {
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Temp8 = Data[Index];
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Data[Index] = Data[Index + 1];
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Data[Index + 1] = Temp8;
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}
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}
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VOID
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SataDeviceCallBack (
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IN EFI_HII_HANDLE HiiHandle,
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IN UINT16 Class
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)
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{
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EFI_STATUS Status;
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PCI_DEVICE_PATH *PciDevicePath;
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CHAR8 *NewString;
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CHAR8 *SoftPres;
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UINT8 Index;
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UINTN HandleCount;
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EFI_HANDLE *HandleBuffer;
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EFI_DEVICE_PATH_PROTOCOL *DevicePath;
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EFI_DEVICE_PATH_PROTOCOL *DevicePathNode;
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EFI_DISK_INFO_PROTOCOL *DiskInfo;
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UINT32 SataPortIndex, IdeChannel;
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EFI_ATA_IDENTIFY_DATA *IdentifyDriveInfo = NULL;
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UINT32 BufferSize = 0;
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EFI_STRING_ID Token;
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EFI_STRING_ID SoftPresStatus;
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CHAR8 ModelNumber[42];
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UINT64 NumSectors = 0;
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UINT64 DriveSizeInBytes = 0;
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UINT64 RemainderInBytes = 0;
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UINT32 DriveSizeInGB = 0;
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UINT32 NumTenthsOfGB = 0;
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EFI_PCI_IO_PROTOCOL *PciIo;
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UINTN Segment;
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UINTN Bus;
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UINTN Device;
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UINTN Function;
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//
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// If SATA controller has been connected, just return
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//
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if (SataControllerConnected) {
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return;
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}
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DEBUG ((DEBUG_INFO, "Update SATA device info\n"));
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Status = gBS->LocateHandleBuffer (
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ByProtocol,
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&gEfiPciIoProtocolGuid,
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NULL,
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&HandleCount,
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&HandleBuffer
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);
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if (EFI_ERROR(Status)) {
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HandleCount = 0;
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}
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for (Index = 0; Index < HandleCount; Index++) {
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Status = gBS->HandleProtocol (
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HandleBuffer[Index],
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&gEfiPciIoProtocolGuid,
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(VOID *) &PciIo
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);
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ASSERT_EFI_ERROR(Status);
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PciIo->GetLocation (PciIo, &Segment, &Bus, &Device, &Function);
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if ((Bus == DEFAULT_PCI_BUS_NUMBER_PCH) &&
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(Device == SataDevNumber (0)) &&
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(Function == SataFuncNumber (0))) {
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gBS->ConnectController (HandleBuffer[Index], NULL, NULL, TRUE);
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}
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}
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if (HandleBuffer) {
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FreePool (HandleBuffer);
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}
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//
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// Indicate SATA controller has been connected
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//
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SataControllerConnected = TRUE;
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//
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// Assume no line strings is longer than 256 bytes.
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//
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NewString = AllocatePool (0x100);
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ASSERT (NewString != NULL);
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if (NewString == NULL) {
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return;
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}
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SoftPres = AllocatePool (0x40);
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ASSERT (SoftPres != NULL);
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if (SoftPres == NULL) {
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FreePool (NewString);
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return;
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}
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PciDevicePath = NULL;
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Status = gBS->LocateHandleBuffer (
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ByProtocol,
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&gEfiDiskInfoProtocolGuid,
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NULL,
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&HandleCount,
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&HandleBuffer
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);
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if (EFI_ERROR(Status)) HandleCount = 0;
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for (Index = 0; Index < HandleCount; Index++) {
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Status = gBS->HandleProtocol (
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HandleBuffer[Index],
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&gEfiDevicePathProtocolGuid,
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(VOID *) &DevicePath
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);
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ASSERT_EFI_ERROR(Status);
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DevicePathNode = DevicePath;
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while (!IsDevicePathEndType (DevicePathNode)) {
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if ((DevicePathNode->Type == HARDWARE_DEVICE_PATH) &&
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(DevicePathNode->SubType == HW_PCI_DP))
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{
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PciDevicePath = (PCI_DEVICE_PATH *) DevicePathNode;
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break;
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}
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DevicePathNode = NextDevicePathNode (DevicePathNode);
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}
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if (PciDevicePath == NULL) continue;
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//[-start-210729-IB11790427-modify]//
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if (((PciDevicePath->Device == SataDevNumber (0)) &&
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(PciDevicePath->Function == SataFuncNumber (0))) ||
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((PciDevicePath->Device == 0xE) &&
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(PciDevicePath->Function == 0))) {
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//[-end-210729-IB11790427-modify]//
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Status = gBS->HandleProtocol (
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HandleBuffer[Index],
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&gEfiDiskInfoProtocolGuid,
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(VOID **) &DiskInfo
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);
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ASSERT_EFI_ERROR (Status);
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Status = DiskInfo->WhichIde (
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DiskInfo,
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&IdeChannel,
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&SataPortIndex
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);
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Token = gSATA[IdeChannel];
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SoftPresStatus = gSOFTPRES[IdeChannel];
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IdentifyDriveInfo = AllocatePool(sizeof (EFI_ATAPI_IDENTIFY_DATA));
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ASSERT (IdentifyDriveInfo != NULL);
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if (IdentifyDriveInfo == NULL) {
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return;
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}
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ZeroMem(IdentifyDriveInfo, sizeof (EFI_ATAPI_IDENTIFY_DATA));
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BufferSize = sizeof (EFI_ATAPI_IDENTIFY_DATA);
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Status = DiskInfo->Identify (
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DiskInfo,
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IdentifyDriveInfo,
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&BufferSize
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);
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ASSERT_EFI_ERROR (Status);
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} else {
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continue;
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}
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ZeroMem(ModelNumber, 42);
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CopyMem (ModelNumber, IdentifyDriveInfo->ModelName, 40);
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SwapEntries (ModelNumber, 40);
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ModelNumber[14] = '\0'; // Truncate it at 14 characters
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//
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// For HardDisk append the size. Otherwise display atapi
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//
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if (!(IdentifyDriveInfo->config & ATAPI_DEVICE)) {
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if (IdentifyDriveInfo->command_set_supported_83 & _48_BIT_ADDRESS_FEATURE_SET_SUPPORTED) {
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NumSectors = *(UINT64 *) &IdentifyDriveInfo->maximum_lba_for_48bit_addressing;
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} else {
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NumSectors = (UINT64) *(UINT32 *) &IdentifyDriveInfo->user_addressable_sectors_lo;
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}
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DriveSizeInBytes = MultU64x32 (NumSectors, 512);
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//DriveSizeInGB is DriveSizeInBytes / 1 GB (1 Decimal GB = 10^9 bytes)
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DriveSizeInGB = (UINT32) DivU64x64Remainder (DriveSizeInBytes, 1000000000, &RemainderInBytes);
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//Convert the Remainder, which is in bytes, to number of tenths of a Decimal GB.
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NumTenthsOfGB = (UINT32) DivU64x64Remainder (RemainderInBytes, 100000000, NULL);
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AsciiSPrint(NewString, 0x100, "%a (%d.%dGB)", ModelNumber, DriveSizeInGB, NumTenthsOfGB);
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if ((IdentifyDriveInfo->serial_ata_capabilities != 0xFFFF) && (IdentifyDriveInfo->serial_ata_features_supported & 0x0040))
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AsciiSPrint(SoftPres, 0x40, "SUPPORTED");
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else
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AsciiSPrint(SoftPres, 0x40, "NOT SUPPORTED");
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} else {
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AsciiSPrint(NewString, 0x100, "%a ATAPI", ModelNumber);
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AsciiSPrint(SoftPres, 0x40, " N/A ");
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}
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InitString(
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HiiHandle,
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Token,
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L"%a",
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NewString
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);
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InitString(
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HiiHandle,
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SoftPresStatus,
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L"%a",
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SoftPres
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);
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if (IdentifyDriveInfo) {
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FreePool (IdentifyDriveInfo);
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IdentifyDriveInfo = NULL;
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}
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}
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if (HandleBuffer)
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FreePool (HandleBuffer);
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FreePool (NewString);
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FreePool (SoftPres);
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}
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VOID
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DisplaySpiInformation (
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EFI_HII_HANDLE HiiHandle
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)
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{
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UINT32 Flcomp;
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UINT32 FlashComponents;
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UINT32 Signature;
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UINT32 Data32;
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EFI_STATUS Status;
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UINTN VariableSize;
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SETUP_DATA SetupData;
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UINT32 SetupAttr;
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SetupAttr = 0;
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VariableSize = sizeof (SETUP_DATA);
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Status = gRT->GetVariable (
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L"Setup",
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&gSetupVariableGuid,
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&SetupAttr,
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&VariableSize,
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&SetupData
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);
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if (EFI_ERROR (Status)) {
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SetupAttr = EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS;
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}
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ASSERT_EFI_ERROR (Status);
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// Read Descriptor offset 0x10 - To get Descriptor Signature
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Signature = SpiGetDescriptorSignature ();
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DEBUG ((DEBUG_INFO, "\nSignature = 0x%.8x\n", Signature));
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// Read Descriptor offset 0x30 - To get supported features and R/W frequencies
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Flcomp = SpiGetFlashComponentDescription ();
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DEBUG ((DEBUG_INFO, "Flcomp = 0x%.8x\n", Flcomp));
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// Read Descriptor offset 0x14 - To get number of components
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FlashComponents = SpiGetFlashComponentsNumber ();
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DEBUG ((DEBUG_INFO, "FlashComponents = 0x%2x\n", FlashComponents));
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|
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//
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// Dual Output Fast Read support
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//
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if (Flcomp & B_FLASH_FLCOMP_FR_SUP) {
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InitString (HiiHandle, STRING_TOKEN (STR_SPI_DUAL_OUTPUT_FAST_READ_SUPPORT_VALUE), L"%a", "Supported");
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} else {
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InitString (HiiHandle, STRING_TOKEN (STR_SPI_DUAL_OUTPUT_FAST_READ_SUPPORT_VALUE), L"%a", "Not supported");
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}
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|
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//
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// Read ID and Read Status Clock Frequency [27:29]
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//
|
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Data32 = ((Flcomp & B_FLASH_FLCOMP_RIDS_FREQ) >> N_FLASH_FLCOMP_RIDS_FREQ);
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switch (Data32) {
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case V_FLASH_FLCOMP_FREQ_100MHZ:
|
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InitString (HiiHandle, STRING_TOKEN (STR_SPI_READ_ID_STATUS_CLOCK_FREQUENCY_VALUE), L"%a", "100 MHz");
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break;
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case V_FLASH_FLCOMP_FREQ_50MHZ:
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InitString (HiiHandle, STRING_TOKEN (STR_SPI_READ_ID_STATUS_CLOCK_FREQUENCY_VALUE), L"%a", "50 MHz");
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break;
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case V_FLASH_FLCOMP_FREQ_25MHZ:
|
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InitString (HiiHandle, STRING_TOKEN (STR_SPI_READ_ID_STATUS_CLOCK_FREQUENCY_VALUE), L"%a", "25 MHz");
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break;
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case V_FLASH_FLCOMP_FREQ_14MHZ:
|
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InitString (HiiHandle, STRING_TOKEN (STR_SPI_READ_ID_STATUS_CLOCK_FREQUENCY_VALUE), L"%a", "14 MHz");
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break;
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default:
|
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InitString (HiiHandle, STRING_TOKEN (STR_SPI_READ_ID_STATUS_CLOCK_FREQUENCY_VALUE), L"%a", "Invalid Setting");
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break;
|
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}
|
|
|
|
//
|
|
// Write and Erase Clock Frequency [24:26]
|
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//
|
|
Data32 = ((Flcomp & B_FLASH_FLCOMP_WE_FREQ) >> N_FLASH_FLCOMP_WE_FREQ);
|
|
|
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switch (Data32) {
|
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case V_FLASH_FLCOMP_FREQ_100MHZ:
|
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InitString (HiiHandle, STRING_TOKEN (STR_SPI_WRITE_ERASE_CLOCK_FREQUENCY_VALUE), L"%a", "100 MHz");
|
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break;
|
|
case V_FLASH_FLCOMP_FREQ_50MHZ:
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI_WRITE_ERASE_CLOCK_FREQUENCY_VALUE), L"%a", "50 MHz");
|
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break;
|
|
case V_FLASH_FLCOMP_FREQ_25MHZ:
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI_WRITE_ERASE_CLOCK_FREQUENCY_VALUE), L"%a", "25 MHz");
|
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break;
|
|
case V_FLASH_FLCOMP_FREQ_14MHZ:
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI_WRITE_ERASE_CLOCK_FREQUENCY_VALUE), L"%a", "14 MHz");
|
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break;
|
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default:
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI_WRITE_ERASE_CLOCK_FREQUENCY_VALUE), L"%a", "Invalid Setting");
|
|
break;
|
|
}
|
|
|
|
//
|
|
// Fast Read Clock Frequency [21:23]
|
|
//
|
|
Data32 = ((Flcomp & B_FLASH_FLCOMP_FRCF_FREQ) >> N_FLASH_FLCOMP_FRCF_FREQ);
|
|
|
|
switch (Data32) {
|
|
case V_FLASH_FLCOMP_FREQ_100MHZ:
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI_FAST_READ_CLOCK_FREQUENCY_VALUE), L"%a", "100 MHz");
|
|
break;
|
|
case V_FLASH_FLCOMP_FREQ_50MHZ:
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI_FAST_READ_CLOCK_FREQUENCY_VALUE), L"%a", "50 MHz");
|
|
break;
|
|
case V_FLASH_FLCOMP_FREQ_25MHZ:
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI_FAST_READ_CLOCK_FREQUENCY_VALUE), L"%a", "25 MHz");
|
|
break;
|
|
case V_FLASH_FLCOMP_FREQ_14MHZ:
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI_FAST_READ_CLOCK_FREQUENCY_VALUE), L"%a", "14 MHz");
|
|
break;
|
|
default:
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI_FAST_READ_CLOCK_FREQUENCY_VALUE), L"%a", "Invalid Setting");
|
|
break;
|
|
}
|
|
|
|
//
|
|
// Fast Read support [20]
|
|
//
|
|
if (Flcomp & B_FLASH_FLCOMP_FR_SUP) {
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI_FAST_READ_SUPPORT_VALUE), L"%a", "Supported");
|
|
} else {
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI_FAST_READ_SUPPORT_VALUE), L"%a", "Not supported");
|
|
}
|
|
|
|
//
|
|
// Number of components
|
|
//
|
|
switch (FlashComponents) {
|
|
case 0:
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI_NUMBER_OF_COMPONENTS_VALUE), L"%a", "1 Component");
|
|
SetupData.TwoComponents = 0;
|
|
break;
|
|
case 1:
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI_NUMBER_OF_COMPONENTS_VALUE), L"%a", "2 Components");
|
|
SetupData.TwoComponents = 1;
|
|
break;
|
|
default:
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI_NUMBER_OF_COMPONENTS_VALUE), L"%a", "Reserved");
|
|
break;
|
|
}
|
|
Status = gRT->SetVariable (
|
|
L"Setup",
|
|
&gSetupVariableGuid,
|
|
SetupAttr,
|
|
sizeof (SETUP_DATA),
|
|
&SetupData
|
|
);
|
|
ASSERT_EFI_ERROR (Status);
|
|
//
|
|
// Display SPI Component 1 Density
|
|
//
|
|
|
|
// Execute if there are 2 components
|
|
if (FlashComponents == 1){
|
|
switch (Flcomp & 0xF0) {
|
|
case 0:
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI1_DENSITY_VALUE), L"%a", "512 KB");
|
|
break;
|
|
case 1:
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI1_DENSITY_VALUE), L"%a", "1 MB");
|
|
break;
|
|
case 2:
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI1_DENSITY_VALUE), L"%a", "2 MB");
|
|
break;
|
|
case 3:
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI1_DENSITY_VALUE), L"%a", "4 MB");
|
|
break;
|
|
case 4:
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI1_DENSITY_VALUE), L"%a", "8 MB");
|
|
break;
|
|
case 5:
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI1_DENSITY_VALUE), L"%a", "16 MB");
|
|
break;
|
|
case 6:
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI1_DENSITY_VALUE), L"%a", "32 MB");
|
|
break;
|
|
case 7:
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI1_DENSITY_VALUE), L"%a", "64 MB");
|
|
break;
|
|
case 8:
|
|
case 9:
|
|
case 10:
|
|
case 11:
|
|
case 12:
|
|
case 13:
|
|
case 14:
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI1_DENSITY_VALUE), L"%a", "Reserved");
|
|
break;
|
|
default:
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI1_DENSITY_VALUE), L"%a", "Not present");
|
|
break;
|
|
}
|
|
}
|
|
//
|
|
// Display SPI Component 0 Density
|
|
//
|
|
switch (Flcomp & 0x0F) {
|
|
case 0:
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI0_DENSITY_VALUE), L"%a", "512 KB");
|
|
break;
|
|
case 1:
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI0_DENSITY_VALUE), L"%a", "1 MB");
|
|
break;
|
|
case 2:
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI0_DENSITY_VALUE), L"%a", "2 MB");
|
|
break;
|
|
case 3:
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI0_DENSITY_VALUE), L"%a", "4 MB");
|
|
break;
|
|
case 4:
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI0_DENSITY_VALUE), L"%a", "8 MB");
|
|
break;
|
|
case 5:
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI0_DENSITY_VALUE), L"%a", "16 MB");
|
|
break;
|
|
case 6:
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI0_DENSITY_VALUE), L"%a", "32 MB");
|
|
break;
|
|
case 7:
|
|
InitString (HiiHandle, STRING_TOKEN (STR_SPI0_DENSITY_VALUE), L"%a", "64 MB");
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
VOID
|
|
BiosIshDataPass (
|
|
VOID
|
|
)
|
|
{
|
|
static CONST CHAR8 FileName[] = "bios2ish";
|
|
|
|
DEBUG ((DEBUG_INFO, "Sending PDT Unlock Message\n"));
|
|
HeciPdtUnlockMsg (FileName);
|
|
|
|
}
|
|
|
|
STATIC
|
|
BOOLEAN
|
|
PchSetupSata (
|
|
IN EFI_HII_HANDLE HiiHandle,
|
|
OUT SETUP_VOLATILE_DATA *SetupVolatileData,
|
|
OUT PCH_SETUP *PchSetup
|
|
)
|
|
{
|
|
if (PciSegmentRead16 (SataPciCfgBase (SATA_1_CONTROLLER_INDEX)) == 0xFFFF) {
|
|
return FALSE;
|
|
}
|
|
|
|
SataDeviceCallBack (HiiHandle, 0);
|
|
|
|
return FALSE;
|
|
}
|
|
|
|
BOOLEAN
|
|
IsPciePortShadowed (
|
|
UINT32 Index,
|
|
PCH_INFO_HOB *PchInfoHob
|
|
)
|
|
{
|
|
UINT32 Controller;
|
|
UINT32 Port;
|
|
|
|
Controller = Index / PCH_PCIE_CONTROLLER_PORTS;
|
|
Port = Index % PCH_PCIE_CONTROLLER_PORTS;
|
|
|
|
if ((Port == 1) && (PchInfoHob->PcieControllerCfg[Controller] != V_PCH_PCIE_CFG_STRPFUSECFG_RPC_1_1_1_1)) {
|
|
return TRUE;
|
|
} else if ((Port == 2) && ((PchInfoHob->PcieControllerCfg[Controller] == V_PCH_PCIE_CFG_STRPFUSECFG_RPC_4) ||
|
|
(PchInfoHob->PcieControllerCfg[Controller] == V_PCH_PCIE_CFG_STRPFUSECFG_RPC_4_SIP17))) {
|
|
return TRUE;
|
|
} else if ((Port == 3) && ((PchInfoHob->PcieControllerCfg[Controller] == V_PCH_PCIE_CFG_STRPFUSECFG_RPC_4) ||
|
|
(PchInfoHob->PcieControllerCfg[Controller] == V_PCH_PCIE_CFG_STRPFUSECFG_RPC_2_2) ||
|
|
(PchInfoHob->PcieControllerCfg[Controller] == V_PCH_PCIE_CFG_STRPFUSECFG_RPC_4_SIP17))) {
|
|
return TRUE;
|
|
}
|
|
return FALSE;
|
|
}
|
|
|
|
STATIC
|
|
VOID
|
|
PchSetupHdAudio (
|
|
OUT SETUP_VOLATILE_DATA* SetupVolatileData
|
|
)
|
|
{
|
|
UINT32 Index;
|
|
VOID *HobPtr;
|
|
PCH_INFO_HOB *PchInfoHob;
|
|
|
|
HobPtr = GetFirstGuidHob (&gPchInfoHobGuid);
|
|
if (HobPtr == NULL) {
|
|
ASSERT (FALSE);
|
|
return;
|
|
}
|
|
PchInfoHob = (PCH_INFO_HOB*) GET_GUID_HOB_DATA (HobPtr);
|
|
if (PchInfoHob == NULL) {
|
|
ASSERT (FALSE);
|
|
return;
|
|
}
|
|
|
|
SetupVolatileData->AudioDspFusedOut = (UINT8) PchInfoHob->AudioDspFusedOut;
|
|
SetupVolatileData->AudioHdaLinkSupported = IsAudioInterfaceSupported (HdaLink, 0);
|
|
|
|
for (Index = 0; Index < GetPchHdaMaxDmicLinkNum (); Index++) {
|
|
SetupVolatileData->AudioDmicLinkSupported[Index] = IsAudioInterfaceSupported (HdaDmic, Index);
|
|
}
|
|
|
|
for (Index = 0; Index < GetPchHdaMaxSspLinkNum (); Index++) {
|
|
SetupVolatileData->AudioSspLinkSupported[Index] = IsAudioInterfaceSupported (HdaSsp, Index);
|
|
}
|
|
|
|
for (Index = 0; Index < GetPchHdaMaxSndwLinkNum (); Index++) {
|
|
SetupVolatileData->AudioSndwLinkSupported[Index] = IsAudioInterfaceSupported (HdaSndw, Index);
|
|
}
|
|
}
|
|
|
|
STATIC
|
|
VOID
|
|
PchSetupCrid (
|
|
OUT SETUP_VOLATILE_DATA* SetupVolatileData
|
|
)
|
|
{
|
|
VOID *HobPtr;
|
|
PCH_INFO_HOB *PchInfoHob;
|
|
|
|
HobPtr = GetFirstGuidHob (&gPchInfoHobGuid);
|
|
if (HobPtr == NULL) {
|
|
ASSERT (FALSE);
|
|
return;
|
|
}
|
|
PchInfoHob = (PCH_INFO_HOB*) GET_GUID_HOB_DATA (HobPtr);
|
|
if (PchInfoHob == NULL) {
|
|
ASSERT (FALSE);
|
|
return;
|
|
}
|
|
SetupVolatileData->PchCridSupport = (UINT8) PchInfoHob->CridSupport;
|
|
}
|
|
|
|
#if FixedPcdGetBool(PcdAdlLpSupport) == 1
|
|
STATIC
|
|
VOID
|
|
PchSetupScs (
|
|
OUT SETUP_VOLATILE_DATA* SetupVolatileData
|
|
)
|
|
{
|
|
UINT8 UfsIndex;
|
|
|
|
for (UfsIndex = 0; UfsIndex < PchGetMaxUfsNum (); UfsIndex++) {
|
|
SetupVolatileData->UfsSupported[UfsIndex] = TRUE;
|
|
}
|
|
if (IsPchEmmcSupported ()) {
|
|
SetupVolatileData->EmmcSupported = TRUE;
|
|
}
|
|
}
|
|
#endif
|
|
|
|
STATIC
|
|
VOID
|
|
PchSetupPcie (
|
|
IN EFI_HII_HANDLE HiiHandle,
|
|
OUT SETUP_VOLATILE_DATA* SetupVolatileData
|
|
)
|
|
{
|
|
UINT32 Index;
|
|
VOID *HobPtr;
|
|
PCH_INFO_HOB *PchInfoHob;
|
|
|
|
HobPtr = GetFirstGuidHob (&gPchInfoHobGuid);
|
|
ASSERT (HobPtr != NULL);
|
|
if (HobPtr == NULL) {
|
|
return;
|
|
}
|
|
PchInfoHob = (PCH_INFO_HOB*) GET_GUID_HOB_DATA (HobPtr);
|
|
ASSERT (PchInfoHob != NULL);
|
|
if (PchInfoHob == NULL) {
|
|
return;
|
|
}
|
|
|
|
for (Index = 0; Index < GetPchMaxPciePortNum (); Index ++) {
|
|
if (PchInfoHob->PciePortFuses & (BIT0 << Index)) {
|
|
SetupVolatileData->PciePortCfg[Index] = PCH_RP_FUSED_OFF;
|
|
} else if ((PchInfoHob->PciePortLaneEnabled & (BIT0 << Index)) == 0) {
|
|
SetupVolatileData->PciePortCfg[Index] = PCH_RP_DIFFERENT_BUS;
|
|
} else if (IsPciePortShadowed (Index, PchInfoHob)) {
|
|
SetupVolatileData->PciePortCfg[Index] = PCH_RP_MERGED;
|
|
} else {
|
|
SetupVolatileData->PciePortCfg[Index] = PCH_RP_AVAILABLE;
|
|
}
|
|
}
|
|
for (Index = GetPchMaxPciePortNum (); Index < ARRAY_SIZE (SetupVolatileData->PciePortCfg); Index ++) {
|
|
SetupVolatileData->PciePortCfg[Index] = PCH_RP_NOT_IMPLEMENTED;
|
|
}
|
|
for (Index = 0; Index < ARRAY_SIZE (SetupVolatileData->PciePortCfg); Index ++) {
|
|
DEBUG ((DEBUG_INFO, "VolatileData.PciePortCfg[%d] = %d\n", Index, SetupVolatileData->PciePortCfg[Index]));
|
|
}
|
|
|
|
}
|
|
|
|
/*
|
|
Update SETUP_VOLATILE_DATA PCH USB related data
|
|
*/
|
|
STATIC
|
|
VOID
|
|
PchSetupUsb (
|
|
OUT SETUP_VOLATILE_DATA *SetupVolatileData
|
|
)
|
|
{
|
|
//
|
|
// USB Ports Count update
|
|
//
|
|
SetupVolatileData->PchUsb2PortCount = GetPchUsb2MaxPhysicalPortNum ();
|
|
SetupVolatileData->PchUsb3PortCount = GetPchXhciMaxUsb3PortNum ();
|
|
}
|
|
|
|
STATIC
|
|
VOID
|
|
PchSetupGbe (
|
|
OUT SETUP_VOLATILE_DATA *SetupVolatileData
|
|
)
|
|
{
|
|
SetupVolatileData->GbeSupportByPch = PchIsGbeSupported ();
|
|
SetupVolatileData->GbeAvailable = IsGbePresent ();
|
|
}
|
|
|
|
STATIC
|
|
VOID
|
|
PchSetupTsn (
|
|
OUT SETUP_VOLATILE_DATA *SetupVolatileData
|
|
)
|
|
{
|
|
SetupVolatileData->TsnSupportByPch = PchIsTsnSupported ();
|
|
SetupVolatileData->TsnAvailable = IsTsnPresent ();
|
|
}
|
|
|
|
STATIC
|
|
VOID
|
|
PchSetupThc (
|
|
OUT SETUP_VOLATILE_DATA *SetupVolatileData
|
|
)
|
|
{
|
|
VOID *HobPtr;
|
|
PCH_INFO_HOB *PchInfoHob;
|
|
|
|
HobPtr = GetFirstGuidHob (&gPchInfoHobGuid);
|
|
ASSERT (HobPtr != NULL);
|
|
if (HobPtr == NULL) {
|
|
return;
|
|
}
|
|
PchInfoHob = (PCH_INFO_HOB*) GET_GUID_HOB_DATA (HobPtr);
|
|
ASSERT (PchInfoHob != NULL);
|
|
if (PchInfoHob == NULL) {
|
|
return;
|
|
}
|
|
SetupVolatileData->ThcSupported = IsPchThcSupported ();
|
|
SetupVolatileData->ThcAvailable = PchInfoHob->Thc0Strap;
|
|
}
|
|
|
|
STATIC
|
|
VOID
|
|
PchSetupIsh (
|
|
OUT SETUP_VOLATILE_DATA *SetupVolatileData
|
|
)
|
|
{
|
|
SetupVolatileData->IshAvailable = IsIshPresent ();
|
|
}
|
|
|
|
STATIC
|
|
VOID
|
|
PchSetupPSOn (
|
|
OUT SETUP_VOLATILE_DATA *SetupVolatileData
|
|
)
|
|
{
|
|
SetupVolatileData->PSOnSupported = IsPchPSOnSupported ();
|
|
}
|
|
|
|
STATIC
|
|
VOID
|
|
UpdateChipsetInitInfo (
|
|
IN EFI_HII_HANDLE HiiHandle
|
|
)
|
|
{
|
|
VOID *HobPtr;
|
|
CHAR8 BaseVersion[3];
|
|
CHAR8 OemVersion[3];
|
|
CHIPSET_INIT_INFO *ChipsetInitHob;
|
|
|
|
HobPtr = GetFirstGuidHob (&gChipsetInitHobGuid);
|
|
if (HobPtr != NULL) {
|
|
ChipsetInitHob = (CHIPSET_INIT_INFO*) GET_GUID_HOB_DATA (HobPtr);
|
|
} else {
|
|
return;
|
|
}
|
|
|
|
AsciiSPrint (BaseVersion, sizeof (BaseVersion), "%x", ChipsetInitHob->BaseVersion);
|
|
AsciiSPrint (OemVersion, sizeof (OemVersion), "%x", ChipsetInitHob->OemVersion);
|
|
|
|
InitString (
|
|
HiiHandle,
|
|
STRING_TOKEN (STR_CHIP_HSIO_BASE_REV_VALUE),
|
|
L"%a",
|
|
BaseVersion
|
|
);
|
|
InitString (
|
|
HiiHandle,
|
|
STRING_TOKEN (STR_CHIP_HSIO_OEM_REV_VALUE),
|
|
L"%a",
|
|
OemVersion
|
|
);
|
|
|
|
InitString (
|
|
HiiHandle,
|
|
STRING_TOKEN (STR_CHIP_HSIO_INTEL_VER_VALUE),
|
|
L"%d.%d.%d.%d",
|
|
ChipsetInitHob->IntelMajor, ChipsetInitHob->IntelMinor, ChipsetInitHob->IntelHotFix, ChipsetInitHob->IntelBuild
|
|
);
|
|
|
|
InitString (
|
|
HiiHandle,
|
|
STRING_TOKEN (STR_CHIP_HSIO_OEM_VER_VALUE),
|
|
L"%d.%d.%d.%d",
|
|
ChipsetInitHob->OemMajor, ChipsetInitHob->OemMinor, ChipsetInitHob->OemHotFix, ChipsetInitHob->OemBuild
|
|
);
|
|
}
|
|
|
|
STATIC
|
|
VOID
|
|
UpdateChipsetInfo (
|
|
IN EFI_HII_HANDLE HiiHandle
|
|
)
|
|
{
|
|
CHAR8 Buffer[PCH_STEPPING_STR_LENGTH_MAX];
|
|
|
|
InitString (
|
|
HiiHandle,
|
|
STRING_TOKEN (STR_CHIP_SB_VALUE),
|
|
L"%a",
|
|
PchGetSeriesStr ()
|
|
);
|
|
|
|
PchGetSteppingStr (Buffer, sizeof (Buffer));
|
|
InitString (
|
|
HiiHandle,
|
|
STRING_TOKEN(STR_CHIP_SB_REV_VALUE),
|
|
L"%a",
|
|
Buffer
|
|
);
|
|
|
|
InitString (
|
|
HiiHandle,
|
|
STRING_TOKEN(STR_CHIP_SB_SKU_VALUE),
|
|
L"%a",
|
|
PchGetSkuStr ()
|
|
);
|
|
}
|
|
|
|
VOID
|
|
InitSBStrings (
|
|
EFI_HII_HANDLE HiiHandle,
|
|
UINT16 Class
|
|
)
|
|
{
|
|
EFI_STATUS Status;
|
|
UINTN VariableSize;
|
|
UINT32 PchSetupAttr;
|
|
PCH_SETUP PchSetup;
|
|
SETUP_VOLATILE_DATA VolatileData;
|
|
UINT32 SetupVolVarAttr;
|
|
BOOLEAN UpdatePchSetup;
|
|
|
|
if (Class == ADVANCED_FORM_SET_CLASS) {
|
|
DEBUG ((DEBUG_INFO, "<InitSBStrings>"));
|
|
|
|
UpdatePchSetup = FALSE;
|
|
|
|
VariableSize = sizeof (SETUP_VOLATILE_DATA);
|
|
Status = gRT->GetVariable (
|
|
L"SetupVolatileData",
|
|
&gSetupVariableGuid,
|
|
&SetupVolVarAttr,
|
|
&VariableSize,
|
|
&VolatileData
|
|
);
|
|
ASSERT_EFI_ERROR (Status);
|
|
|
|
VariableSize = sizeof (PCH_SETUP);
|
|
Status = gRT->GetVariable (
|
|
L"PchSetup",
|
|
&gPchSetupVariableGuid,
|
|
&PchSetupAttr,
|
|
&VariableSize,
|
|
&PchSetup
|
|
);
|
|
ASSERT_EFI_ERROR (Status);
|
|
|
|
//
|
|
// Update SetupVolatileData and PchSetup
|
|
//
|
|
PchSetupPcie (HiiHandle, &VolatileData);
|
|
UpdatePchSetup |= PchSetupSata (HiiHandle, &VolatileData, &PchSetup);
|
|
PchSetupUsb (&VolatileData);
|
|
PchSetupGbe (&VolatileData);
|
|
PchSetupTsn (&VolatileData);
|
|
#if FixedPcdGetBool(PcdAdlLpSupport) == 1
|
|
PchSetupScs (&VolatileData);
|
|
#endif
|
|
PchSetupHdAudio (&VolatileData);
|
|
PchSetupThc (&VolatileData);
|
|
PchSetupIsh (&VolatileData);
|
|
PchSetupPSOn (&VolatileData);
|
|
PchSetupCrid (&VolatileData);
|
|
|
|
// Send PDT Unlock Message to ISH
|
|
if (PchSetup.PchIshPdtUnlock == 1) {
|
|
BiosIshDataPass ();
|
|
//Set the value back to 0 so the user needs to manually enable the option to send the next PDT unlock message
|
|
PchSetup.PchIshPdtUnlock = 0;
|
|
UpdatePchSetup = TRUE;
|
|
}
|
|
|
|
//
|
|
// Update PchSetup if needed
|
|
//
|
|
if (UpdatePchSetup == TRUE) {
|
|
Status = gRT->SetVariable (
|
|
L"PchSetup",
|
|
&gPchSetupVariableGuid,
|
|
PchSetupAttr,
|
|
sizeof (PCH_SETUP),
|
|
&PchSetup
|
|
);
|
|
ASSERT_EFI_ERROR (Status);
|
|
}
|
|
|
|
Status = gRT->SetVariable (
|
|
L"SetupVolatileData",
|
|
&gSetupVariableGuid,
|
|
SetupVolVarAttr,
|
|
sizeof (SETUP_VOLATILE_DATA),
|
|
&VolatileData
|
|
);
|
|
ASSERT_EFI_ERROR (Status);
|
|
|
|
} // ADVANCED_FORM_SET_CLASS
|
|
|
|
if (Class == MAIN_FORM_SET_CLASS) {
|
|
DEBUG ((DEBUG_INFO, "<InitSBStrings>"));
|
|
|
|
UpdateChipsetInfo (HiiHandle);
|
|
UpdateChipsetInitInfo (HiiHandle);
|
|
|
|
InitString (
|
|
HiiHandle,
|
|
STRING_TOKEN (STR_CHIP_SB_PACKAGE_VALUE),
|
|
L"%a",
|
|
"Not Implemented Yet"
|
|
);
|
|
|
|
//
|
|
// SPI controller information
|
|
//
|
|
DisplaySpiInformation(HiiHandle);
|
|
} // MAIN_FORM_SET_CLASS
|
|
}
|
|
|