| .. |
|
AcpiSetup.c
|
init
|
2026-06-18 00:35:57 +08:00 |
|
AcpiSetup.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
AcpiSetup.uni
|
init
|
2026-06-18 00:35:57 +08:00 |
|
Advanced.vfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
AmtSetup.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
AmtSetup.uni
|
init
|
2026-06-18 00:35:57 +08:00 |
|
Boot.vfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
BootSetup.c
|
init
|
2026-06-18 00:35:57 +08:00 |
|
ConnectivitySetup.c
|
init
|
2026-06-18 00:35:57 +08:00 |
|
ConnectivitySetup.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
ConnectivitySetup.uni
|
init
|
2026-06-18 00:35:57 +08:00 |
|
ConnectivitySetup_C770.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
ConnectivitySetup_C970.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
CpuSetup.c
|
init
|
2026-06-18 00:35:57 +08:00 |
|
CpuSetup.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
CpuSetup.uni
|
init
|
2026-06-18 00:35:57 +08:00 |
|
CpuUsbSingleSsPort.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
CpuUsbSingleSsPort_Disable.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
CpuUsbStringPool.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
DebugSetup.c
|
init
|
2026-06-18 00:35:57 +08:00 |
|
DebugSetup.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
DebugSetup.uni
|
init
|
2026-06-18 00:35:57 +08:00 |
|
DimmInfo.c
|
init
|
2026-06-18 00:35:57 +08:00 |
|
DimmInfoLib.inf
|
init
|
2026-06-18 00:35:57 +08:00 |
|
DiscreteTbtOptions.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
DiscreteTbtResourcesInitValues.h
|
init
|
2026-06-18 00:35:57 +08:00 |
|
EcSetup.c
|
init
|
2026-06-18 00:35:57 +08:00 |
|
EcVoltage.c
|
init
|
2026-06-18 00:35:57 +08:00 |
|
FusaSetup.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
FusaSetup.uni
|
init
|
2026-06-18 00:35:57 +08:00 |
|
FwConfig.uni
|
init
|
2026-06-18 00:35:57 +08:00 |
|
HhmSetup.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
HhmSetup.uni
|
init
|
2026-06-18 00:35:57 +08:00 |
|
HiiConfigAccess.c
|
init
|
2026-06-18 00:35:57 +08:00 |
|
IccSetup.c
|
init
|
2026-06-18 00:35:57 +08:00 |
|
IccSetup.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
IccSetup.uni
|
init
|
2026-06-18 00:35:57 +08:00 |
|
InitStringList.h
|
init
|
2026-06-18 00:35:57 +08:00 |
|
IntegratedTbtOptions.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
ItbtPcieSetupSinglePort.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
ItbtPcieStringPool.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
Main.vfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
MeSetup.c
|
init
|
2026-06-18 00:35:57 +08:00 |
|
MeSetup.h
|
init
|
2026-06-18 00:35:57 +08:00 |
|
MeSetup.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
MeSetup.uni
|
init
|
2026-06-18 00:35:57 +08:00 |
|
OverClockSetup.c
|
init
|
2026-06-18 00:35:57 +08:00 |
|
OverClockSetup.h
|
init
|
2026-06-18 00:35:57 +08:00 |
|
OverClockSetup.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
OverClockSetup.uni
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PchIshStringPool.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PchPcieSetupSinglePort.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PchPcieSetupSinglePortMenu.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PchPcieSetupSinglePort_Disable.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PchPcieStringPool.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PchSetup.c
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PchSetup.h
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PchSetup.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PchSetup.uni
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PchSetupIshGp.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PchSetupIshI2c.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PchSetupIshSpi.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PchSetupIshUart.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PchSetupTsnGbe.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PchThcController.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PchThcStringPool.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PchUfsSingleController.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PchUfsSingleController_Disable.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PchUfsStringPool.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PchUsbSingleHsPort.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PchUsbSingleHsPort_Disable.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PchUsbSingleSsPort.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PchUsbSingleSsPort_Disable.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PchUsbStringPool.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PciBusSetup.c
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PciBusSetup.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PciBusSetup.uni
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PcieEq.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PcieSetup.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PcieSetup.uni
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PlatformSetup.c
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PlatformSetup.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PlatformSetup.uni
|
init
|
2026-06-18 00:35:57 +08:00 |
|
PmcFivrSetup.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
SaPcieSetupSinglePort.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
SaPcieSetupSinglePortMenu.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
SaPcieSetupSinglePort_Disable.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
SaPcieSetupSinglePort_DisableForS77014.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
SaPcieStringPool.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
SaSetup.c
|
init
|
2026-06-18 00:35:57 +08:00 |
|
SaSetup.h
|
init
|
2026-06-18 00:35:57 +08:00 |
|
SaSetup.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
SaSetup.uni
|
init
|
2026-06-18 00:35:57 +08:00 |
|
SecuritySetup.c
|
init
|
2026-06-18 00:35:57 +08:00 |
|
Setup.c
|
init
|
2026-06-18 00:35:57 +08:00 |
|
Setup.inf
|
init
|
2026-06-18 00:35:57 +08:00 |
|
Setup.uni
|
init
|
2026-06-18 00:35:57 +08:00 |
|
SetupCallbackExList.h
|
init
|
2026-06-18 00:35:57 +08:00 |
|
SetupCallbackList.h
|
init
|
2026-06-18 00:35:57 +08:00 |
|
SetupId.h
|
init
|
2026-06-18 00:35:57 +08:00 |
|
SetupPreProcTools.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
SetupPrivate.h
|
init
|
2026-06-18 00:35:57 +08:00 |
|
SetupStrTokens.h
|
init
|
2026-06-18 00:35:57 +08:00 |
|
SioNat87393VSetup.c
|
init
|
2026-06-18 00:35:57 +08:00 |
|
SioNat87393VSetup.h
|
init
|
2026-06-18 00:35:57 +08:00 |
|
SioNat87393VSetup.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
SioNat87393VSetup.uni
|
init
|
2026-06-18 00:35:57 +08:00 |
|
SioNct6776FSetup.c
|
init
|
2026-06-18 00:35:57 +08:00 |
|
SioNct6776FSetup.h
|
init
|
2026-06-18 00:35:57 +08:00 |
|
SioNct6776FSetup.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
SioNct6776FSetup.uni
|
init
|
2026-06-18 00:35:57 +08:00 |
|
SioSetup.h
|
init
|
2026-06-18 00:35:57 +08:00 |
|
SioWPCN381USetup.c
|
init
|
2026-06-18 00:35:57 +08:00 |
|
SioWPCN381USetup.h
|
init
|
2026-06-18 00:35:57 +08:00 |
|
SioWPCN381USetup.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
SioWPCN381USetup.uni
|
init
|
2026-06-18 00:35:57 +08:00 |
|
StatusCodeSetup.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
StatusCodeSetup.uni
|
init
|
2026-06-18 00:35:57 +08:00 |
|
TbtSetup.c
|
init
|
2026-06-18 00:35:57 +08:00 |
|
TbtSetup.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
TbtSetup.uni
|
init
|
2026-06-18 00:35:57 +08:00 |
|
TccCpuPcieSetup.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
TccPchPcieSetup.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
TccSetup.c
|
init
|
2026-06-18 00:35:57 +08:00 |
|
TccSetup.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
TccSetup.uni
|
init
|
2026-06-18 00:35:57 +08:00 |
|
TcgSetup.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
TcgSetup.uni
|
init
|
2026-06-18 00:35:57 +08:00 |
|
VFR.uni
|
init
|
2026-06-18 00:35:57 +08:00 |
|
dTbtStringPool.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |
|
iTbtStringPool.hfr
|
init
|
2026-06-18 00:35:57 +08:00 |