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alder_lake_bios/Intel/AlderLake/AlderLakePlatSamplePkg/Setup/SaPcieSetupSinglePort.hfr

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/** @file
;******************************************************************************
;* Copyright (c) 2021, Insyde Software Corp. All Rights Reserved.
;*
;* You may not reproduce, distribute, publish, display, perform, modify, adapt,
;* transmit, broadcast, present, recite, release, license or otherwise exploit
;* any part of this publication in any form, by any means, without the prior
;* written permission of Insyde Software Corporation.
;*
;******************************************************************************
**/
/** @file
@copyright
INTEL CONFIDENTIAL
Copyright 2014 - 2021 Intel Corporation.
The source code contained or described herein and all documents related to the
source code ("Material") are owned by Intel Corporation or its suppliers or
licensors. Title to the Material remains with Intel Corporation or its suppliers
and licensors. The Material may contain trade secrets and proprietary and
confidential information of Intel Corporation and its suppliers and licensors,
and is protected by worldwide copyright and trade secret laws and treaty
provisions. No part of the Material may be used, copied, reproduced, modified,
published, uploaded, posted, transmitted, distributed, or disclosed in any way
without Intel's prior express written permission.
No license under any patent, copyright, trade secret or other intellectual
property right is granted to or conferred upon you by disclosure or delivery
of the Materials, either expressly, by implication, inducement, estoppel or
otherwise. Any license under such intellectual property rights must be
express and approved by Intel in writing.
Unless otherwise agreed by Intel in writing, you may not remove or alter
this notice or any other notice embedded in Materials by Intel or
Intel's suppliers or licensors in any way.
This file contains a 'Sample Driver' and is licensed as such under the terms
of your license agreement with Intel or your vendor. This file may be modified
by the user, subject to the additional terms of the license agreement.
@par Specification
**/
form formid = CONCATENATE3(CPU_PCIERP,PORT_INDEX,_OPTIONS_FORM_ID),
title = STRING_TOKEN(CONCATENATE3(STR_CPU_PCIERP,PORT_INDEX,_OPTIONS_FORM_TITLE));
oneof varid = SA_SETUP.PcieRootPortEn[PORT_INDEX],
prompt = STRING_TOKEN(CONCATENATE2(STR_CPU_PCIE_PROMPT,PORT_INDEX)),
help = STRING_TOKEN(STR_CPU_PCIERP_HELP),
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
endoneof;
suppressif ideqval SA_SETUP.PcieRootPortEn[PORT_INDEX] == 0x0;
grayoutif ideqval SA_SETUP.PcieRootPortHPE[PORT_INDEX] == 1;
oneof varid = SA_SETUP.PcieRootPortSI[PORT_INDEX],
prompt = STRING_TOKEN(CONCATENATE2(STR_CPU_PCIE_SI_PROMPT,PORT_INDEX)),
help = STRING_TOKEN(STR_PCIE_SLOT_IMPLEMENTED_HELP),
option text = STRING_TOKEN(STR_PCIE_BUILT_IN), value = 0, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_PCIE_SLOT), value = 1, flags = DEFAULT | RESET_REQUIRED;
endoneof;
endif;
oneof varid = SA_SETUP.PcieRootPortClockGating[PORT_INDEX],
questionid = CONCATENATE3(SA_PCIE_CKG,PORT_INDEX,_QUESTION_ID),
prompt = STRING_TOKEN(CONCATENATE2(STR_PCIE_CKG_PROMPT,PORT_INDEX)),
help = STRING_TOKEN(STR_PCIE_CKG_HELP),
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
endoneof;
oneof varid = SA_SETUP.PcieRootPortPowerGating[PORT_INDEX],
prompt = STRING_TOKEN(STR_PCIE_PWG_PROMPT),
help = STRING_TOKEN(STR_PCIE_PWG_HELP),
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
endoneof;
oneof varid = SA_SETUP.PcieRootPortAspm[PORT_INDEX],
questionid = CONCATENATE3(CPU_ASPM_PCIERP,PORT_INDEX,_QUESTION_ID),
prompt = STRING_TOKEN(CONCATENATE2(STR_CPU_PCIE_ASPM_PROMPT,PORT_INDEX)),
help = STRING_TOKEN(STR_PCIE_ASPM_HELP),
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_PCIE_ASPM_L0S_STRING), value = 1, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_PCIE_ASPM_L1_STRING), value = 2, flags = DEFAULT | RESET_REQUIRED;
option text = STRING_TOKEN(STR_PCIE_ASPM_L0SL1_STRING), value = 3, flags = RESET_REQUIRED;
endoneof;
grayoutif ideqval SA_SETUP.PcieRootPortClockReqMsgEnable[PORT_INDEX] == 0;
oneof varid = SA_SETUP.PcieRootPortL1SubStates[PORT_INDEX],
questionid = CONCATENATE3(CPU_L1SUB_PCIERP,PORT_INDEX,_QUESTION_ID),
prompt = STRING_TOKEN(CONCATENATE2(STR_CPU_PCIE_L1SUB_PROMPT,PORT_INDEX)),
help = STRING_TOKEN(STR_CPU_PCIE_L1SUB_HELP),
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_CPU_PCIE_L1SUB_1_STRING), value = 1, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_CPU_PCIE_L1SUB_1_2_STRING), value = 2, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
endoneof;
endif;
oneof varid = SA_SETUP.PcieRootPortEqPh3Method[PORT_INDEX],
prompt = STRING_TOKEN(STR_CPU_PCIE_ROOTPORT_EQPH3_PROMPT),
help = STRING_TOKEN(STR_PCIE_ROOTPORT_EQPH3_HELP),
option text = STRING_TOKEN(STR_PCIE_ROOTPORT_EQPH3_HW), value = 1, flags = RESET_REQUIRED | DEFAULT;
option text = STRING_TOKEN(STR_PCIE_ROOTPORT_EQPH3_STATIC_COEFF), value = 4, flags = RESET_REQUIRED;
endoneof;
oneof varid = SA_SETUP.PcieRootPortGen4EqPh3Method[PORT_INDEX],
prompt = STRING_TOKEN(STR_CPU_PCIE_GEN4_ROOTPORT_EQPH3_PROMPT),
help = STRING_TOKEN(STR_PCIE_ROOTPORT_EQPH3_HELP),
option text = STRING_TOKEN(STR_PCIE_ROOTPORT_EQPH3_HW), value = 1, flags = RESET_REQUIRED | DEFAULT;
option text = STRING_TOKEN(STR_PCIE_ROOTPORT_EQPH3_STATIC_COEFF), value = 4, flags = RESET_REQUIRED;
endoneof;
oneof varid = SA_SETUP.PcieRootPortACS[PORT_INDEX],
prompt = STRING_TOKEN(CONCATENATE2(STR_CPU_PCIE_ACS_PROMPT,PORT_INDEX)),
help = STRING_TOKEN(STR_PCIE_ACS_HELP),
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
endoneof;
oneof varid = SA_SETUP.PcieRootPortPTM[PORT_INDEX],
questionid = CONCATENATE3(CPU_PTM_PCIERP,PORT_INDEX,_QUESTION_ID),
prompt = STRING_TOKEN(CONCATENATE2(STR_CPU_PCIE_PTM_PROMPT,PORT_INDEX)),
help = STRING_TOKEN(STR_CPU_PCIE_PTM_HELP),
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
endoneof;
oneof varid = SA_SETUP.PcieRootPortDPC[PORT_INDEX],
prompt = STRING_TOKEN(CONCATENATE2(STR_CPU_PCIE_DPC_PROMPT,PORT_INDEX)),
help = STRING_TOKEN(STR_CPU_PCIE_DPC_HELP),
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED;
endoneof;
oneof varid = SA_SETUP.CpuPcieFomsCp[PORT_INDEX],
prompt = STRING_TOKEN(CONCATENATE2(STR_CPU_PCIE_FOMSCP_PROMPT,PORT_INDEX)),
help = STRING_TOKEN(STR_CPU_PCIE_FOMSCP_HELP),
option text = STRING_TOKEN(STR_AUTO), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
option text = STRING_TOKEN(STR_GEN3), value = 1, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_GEN4), value = 2, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_GEN3_GEN4), value = 3, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_GEN5), value = 4, flags = RESET_REQUIRED;
endoneof;
oneof varid = SA_SETUP.PcieRootPortMultiVc[PORT_INDEX],
questionid = CONCATENATE3(CPU_MULTIVC_PCIERP,PORT_INDEX,_QUESTION_ID),
prompt = STRING_TOKEN(CONCATENATE2(STR_CPU_PCIE_MULTIVC_PROMPT,PORT_INDEX)),
help = STRING_TOKEN(STR_CPU_PCIE_MULTIVC_HELP),
#if FixedPcdGetBool(PcdEmbeddedEnable) == 1
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
#else
default value = cond(GEN5_SUPPORT == 1 ? 1 : 0),
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED;
#endif
endoneof;
oneof varid = SA_SETUP.PcieRootPortEDPC[PORT_INDEX],
prompt = STRING_TOKEN(CONCATENATE2(STR_CPU_PCIE_EDPC_PROMPT,PORT_INDEX)),
help = STRING_TOKEN(STR_CPU_PCIE_EDPC_HELP),
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
endoneof;
oneof varid = SA_SETUP.PcieRootPortURE[PORT_INDEX],
prompt = STRING_TOKEN(CONCATENATE2(STR_CPU_PCIE_URE_PROMPT,PORT_INDEX)),
help = STRING_TOKEN(STR_CPU_PCIE_URE_HELP),
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED;
endoneof;
oneof varid = SA_SETUP.PcieRootPortFEE[PORT_INDEX],
prompt = STRING_TOKEN(CONCATENATE2(STR_CPU_PCIE_FEE_PROMPT,PORT_INDEX)),
help = STRING_TOKEN(STR_CPU_PCIE_FEE_HELP),
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED;
endoneof;
oneof varid = SA_SETUP.PcieRootPortNFE[PORT_INDEX],
prompt = STRING_TOKEN(CONCATENATE2(STR_CPU_PCIE_NFE_PROMPT,PORT_INDEX)),
help = STRING_TOKEN(STR_CPU_PCIE_NFE_HELP),
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED;
endoneof;
oneof varid = SA_SETUP.PcieRootPortCEE[PORT_INDEX],
prompt = STRING_TOKEN(CONCATENATE2(STR_CPU_PCIE_CEE_PROMPT,PORT_INDEX)),
help = STRING_TOKEN(STR_CPU_PCIE_CEE_HELP),
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED;
endoneof;
oneof varid = PCH_SETUP.PcieRootPortCTD[PORT_INDEX],
prompt = STRING_TOKEN(CONCATENATE2(STR_PCH_PCIE_CTD_PROMPT,PORT_INDEX)),
help = STRING_TOKEN(STR_PCH_PCIE_CTD_HELP),
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED;
endoneof;
oneof varid = SA_SETUP.PcieRootPortSFE[PORT_INDEX],
prompt = STRING_TOKEN(CONCATENATE2(STR_CPU_PCIE_SFE_PROMPT,PORT_INDEX)),
help = STRING_TOKEN(STR_CPU_PCIE_SFE_HELP),
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED;
endoneof;
oneof varid = SA_SETUP.PcieRootPortSNE[PORT_INDEX],
prompt = STRING_TOKEN(CONCATENATE2(STR_CPU_PCIE_SNE_PROMPT,PORT_INDEX)),
help = STRING_TOKEN(STR_CPU_PCIE_SNE_HELP),
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED;
endoneof;
oneof varid = SA_SETUP.PcieRootPortSCE[PORT_INDEX],
prompt = STRING_TOKEN(CONCATENATE2(STR_CPU_PCIE_SCE_PROMPT,PORT_INDEX)),
help = STRING_TOKEN(STR_CPU_PCIE_SCE_HELP),
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED;
endoneof;
oneof varid = SA_SETUP.PcieRootPortPMCE[PORT_INDEX],
prompt = STRING_TOKEN(CONCATENATE2(STR_CPU_PCIE_PMCE_PROMPT,PORT_INDEX)),
help = STRING_TOKEN(STR_CPU_PCIE_PMCE_HELP),
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
endoneof;
suppressif ideqval SETUP_VOLATILE_DATA.PlatformFlavor == FlavorDesktop;
suppressif PORT_INDEX == 1;
grayoutif ideqval SA_SETUP.PcieRootPortSI[PORT_INDEX] == 0;
oneof varid = SA_SETUP.PcieRootPortHPE[PORT_INDEX],
prompt = STRING_TOKEN(CONCATENATE2(STR_CPU_PCIE_HPE_PROMPT,PORT_INDEX)),
help = STRING_TOKEN(STR_CPU_PCIE_HPE_HELP),
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED;
endoneof;
endif;
endif;
endif;
oneof varid = SA_SETUP.PcieRootPortAER[PORT_INDEX],
prompt = STRING_TOKEN(CONCATENATE2(STR_CPU_PCIE_AER_PROMPT,PORT_INDEX)),
help = STRING_TOKEN(STR_CPU_PCIE_AER_HELP),
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
endoneof;
oneof varid = SA_SETUP.PcieRootPortSpeed[PORT_INDEX],
prompt = STRING_TOKEN (CONCATENATE2(STR_CPU_PCIE_SPEED_PROMPT,PORT_INDEX)),
help = STRING_TOKEN (STR_CPU_PCIE_SPEED_HELP),
option text = STRING_TOKEN (STR_AUTO), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
option text = STRING_TOKEN (STR_GEN1), value = 1, flags = RESET_REQUIRED;
option text = STRING_TOKEN (STR_GEN2), value = 2, flags = RESET_REQUIRED;
option text = STRING_TOKEN (STR_GEN3), value = 3, flags = RESET_REQUIRED;
option text = STRING_TOKEN (STR_GEN4), value = 4, flags = RESET_REQUIRED;
suppressif PORT_INDEX == 0;
option text = STRING_TOKEN (STR_GEN5), value = 5, flags = RESET_REQUIRED;
endif;
endoneof;
oneof varid = SA_SETUP.PcieRootPortClockReqMsgEnable[PORT_INDEX],
prompt = STRING_TOKEN(CONCATENATE2(STR_CPU_PCIE_ROOTPORT_CLKREQMSG_ENABLE_PROMPT,PORT_INDEX)),
help = STRING_TOKEN(STR_CPU_PCIE_ROOTPORT_CLKREQMSG_ENABLE_HELP),
option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED;
endoneof;
oneof varid = SA_SETUP.PcieRootPortTHS[PORT_INDEX],
prompt = STRING_TOKEN(CONCATENATE2(STR_CPU_PCIE_THS_PROMPT,PORT_INDEX)),
help = STRING_TOKEN(STR_CPU_PCIE_THS_HELP),
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED;
endoneof;
numeric varid = SA_SETUP.PcieDetectTimeoutMs[PORT_INDEX],
prompt = STRING_TOKEN (CONCATENATE2(STR_CPU_PCIE_DETECT_TIMEOUT_PROMPT,PORT_INDEX)),
help = STRING_TOKEN (STR_CPU_PCIE_DETECT_TIMEOUT_HELP),
minimum = 0,
maximum = 65535,
step = 1,
default = 0,
endnumeric;
oneof varid = SA_SETUP.CpuPcieRootPortPeerToPeerMode[PORT_INDEX],
prompt = STRING_TOKEN(CONCATENATE2(STR_CPU_PCIE_ROOTPORT_PEER_TO_PEER_MODE_PROMPT,PORT_INDEX)),
help = STRING_TOKEN(STR_CPU_PCIE_ROOTPORT_PEER_TO_PEER_MODE_HELP),
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED | DEFAULT | MANUFACTURING;
option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED;
endoneof;
suppressif NOT (((PORT_INDEX == 1) AND (ideqval SETUP_VOLATILE_DATA.PlatformFlavor == FlavorDesktop)) OR
((PORT_INDEX == 1) AND (ideqval SETUP_VOLATILE_DATA.PlatformFlavor == FlavorMobileWorkstation)) OR
(((PORT_INDEX == 0) AND (ideqval SETUP_VOLATILE_DATA.PlatformFlavor == FlavorMobile))));
oneof varid = SA_SETUP.PcieFunc0LinkDisable[PORT_INDEX],
prompt = STRING_TOKEN(STR_CPU_PCIE_FUNC0_LINK_DISABLE_PROMPT),
help = STRING_TOKEN(STR_CPU_PCIE_FUNC0_LINK_DISABLE_HELP),
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED;
endoneof;
endif;
SEPARATOR
subtitle text = STRING_TOKEN(STR_CPU_PCIE_LTR_CONFIG);
oneof varid = SA_SETUP.CpuPcieLtrEnable[PORT_INDEX],
prompt = STRING_TOKEN (CONCATENATE2(STR_CPU_PCIE_LTR_PROMPT,PORT_INDEX)),
help = STRING_TOKEN (STR_CPU_PCIE_LTR_HELP),
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
endoneof;
suppressif ideqval SA_SETUP.CpuPcieLtrEnable[PORT_INDEX] == 0;
oneof varid = SA_SETUP.CpuPcieSnoopLatencyOverrideMode[PORT_INDEX],
prompt = STRING_TOKEN (CONCATENATE2(STR_CPU_PCIE_SL_OVRD_PROMPT,PORT_INDEX)),
help = STRING_TOKEN (STR_CPU_PCIE_SL_OVRD_HELP),
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_MANUAL_STRING), value = 1, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_AUTO_STRING), value = 2, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
endoneof;
suppressif NOT ideqval SA_SETUP.CpuPcieSnoopLatencyOverrideMode[PORT_INDEX] == 1;
numeric varid = SA_SETUP.CpuPcieSnoopLatencyOverrideValue[PORT_INDEX],
prompt = STRING_TOKEN(CONCATENATE2(STR_CPU_PCIE_SL_VAL_PROMPT,PORT_INDEX)),
help = STRING_TOKEN(STR_CPU_PCIE_SL_VAL_HELP),
flags = RESET_REQUIRED,
minimum = 0,
maximum = 1023,
step = 1,
default = 60,
endnumeric;
oneof varid = SA_SETUP.CpuPcieSnoopLatencyOverrideMultiplier[PORT_INDEX],
prompt = STRING_TOKEN(CONCATENATE2(STR_CPU_PCIE_SL_SCALE_PROMPT,PORT_INDEX)),
help = STRING_TOKEN(STR_CPU_PCIE_SL_SCALE_HELP),
option text = STRING_TOKEN(STR_LTR_SCALE_0), value = 0, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_LTR_SCALE_1), value = 1, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_LTR_SCALE_2), value = 2, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
option text = STRING_TOKEN(STR_LTR_SCALE_3), value = 3, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_LTR_SCALE_4), value = 4, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_LTR_SCALE_5), value = 5, flags = RESET_REQUIRED;
endoneof;
endif;
oneof varid = SA_SETUP.CpuPcieNonSnoopLatencyOverrideMode[PORT_INDEX],
prompt = STRING_TOKEN (CONCATENATE2(STR_CPU_PCIE_NSL_OVRD_PROMPT,PORT_INDEX)),
help = STRING_TOKEN (STR_CPU_PCIE_NSL_OVRD_HELP),
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_MANUAL_STRING), value = 1, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_AUTO_STRING), value = 2, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
endoneof;
suppressif NOT ideqval SA_SETUP.CpuPcieNonSnoopLatencyOverrideMode[PORT_INDEX] == 1;
numeric varid = SA_SETUP.CpuPcieNonSnoopLatencyOverrideValue[PORT_INDEX],
prompt = STRING_TOKEN(CONCATENATE2(STR_CPU_PCIE_NSL_VAL_PROMPT,PORT_INDEX)),
help = STRING_TOKEN(STR_CPU_PCIE_NSL_VAL_HELP),
flags = RESET_REQUIRED,
minimum = 0,
maximum = 1023,
step = 1,
default = 60,
endnumeric;
oneof varid = SA_SETUP.CpuPcieNonSnoopLatencyOverrideMultiplier[PORT_INDEX],
prompt = STRING_TOKEN(CONCATENATE2(STR_CPU_PCIE_NSL_SCALE_PROMPT,PORT_INDEX)),
help = STRING_TOKEN(STR_CPU_PCIE_NSL_SCALE_HELP),
option text = STRING_TOKEN(STR_LTR_SCALE_0), value = 0, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_LTR_SCALE_1), value = 1, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_LTR_SCALE_2), value = 2, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
option text = STRING_TOKEN(STR_LTR_SCALE_3), value = 3, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_LTR_SCALE_4), value = 4, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_LTR_SCALE_5), value = 5, flags = RESET_REQUIRED;
endoneof;
endif;
oneof varid = SA_SETUP.CpuPcieForceLtrOverride[PORT_INDEX],
prompt = STRING_TOKEN(CONCATENATE2(STR_CPU_PCIE_LTR_OVRD_FORCE_PROMPT,PORT_INDEX)),
help = STRING_TOKEN(STR_CPU_PCIE_LTR_OVRD_FORCE_HELP),
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | RESET_REQUIRED;
option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED;
endoneof;
endif;
SEPARATOR
oneof varid = SA_SETUP.CpuPcieLtrConfigLock[PORT_INDEX],
prompt = STRING_TOKEN (CONCATENATE2(STR_CPU_PCIE_LTRLOCK_PROMPT,PORT_INDEX)),
help = STRING_TOKEN (STR_CPU_PCIE_LTRLOCK_HELP),
option text = STRING_TOKEN(STR_DISABLED), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
option text = STRING_TOKEN(STR_ENABLED), value = 1, flags = RESET_REQUIRED;
endoneof;
endif;
SEPARATOR
subtitle text = STRING_TOKEN(STR_CPU_PCIE_GEN3_HWEQ_CONFIG);
numeric varid = SA_SETUP.PcieRootPortGen3Uptp[PORT_INDEX],
prompt = STRING_TOKEN (STR_CPU_PCIE_UPTP_PROMPT),
help = STRING_TOKEN (STR_CPU_PCIE_UPTP_HELP),
minimum = 0,
maximum = 10,
step = 1,
//[-start-210106-IB17510140-modify]//
#if GEN5_SUPPORT == 1
default = 0x5, defaultstore = MyStandardDefault,
#else
default = 0x7, defaultstore = MyStandardDefault,
#endif
//[-end-210106-IB17510140-modify]//
endnumeric;
numeric varid = SA_SETUP.PcieRootPortGen3Dptp[PORT_INDEX],
prompt = STRING_TOKEN (STR_CPU_PCIE_DPTP_PROMPT),
help = STRING_TOKEN (STR_CPU_PCIE_DPTP_HELP),
minimum = 0,
maximum = 10,
step = 1,
default = 7,
endnumeric;
SEPARATOR
subtitle text = STRING_TOKEN(STR_CPU_PCIE_GEN4_HWEQ_CONFIG);
numeric varid = SA_SETUP.PcieRootPortGen4Uptp[PORT_INDEX],
prompt = STRING_TOKEN (STR_CPU_PCIE_UPTP_PROMPT),
help = STRING_TOKEN (STR_CPU_PCIE_UPTP_HELP),
minimum = 0,
maximum = 10,
step = 1,
//[-start-210106-IB17510140-modify]//
#if GEN5_SUPPORT == 1
default = 0x8, defaultstore = MyStandardDefault,
#else
default = 0x5, defaultstore = MyStandardDefault,
#endif
//[-end-210106-IB17510140-modify]//
endnumeric;
numeric varid = SA_SETUP.PcieRootPortGen4Dptp[PORT_INDEX],
prompt = STRING_TOKEN (STR_CPU_PCIE_DPTP_PROMPT),
help = STRING_TOKEN (STR_CPU_PCIE_DPTP_HELP),
minimum = 0,
maximum = 10,
step = 1,
//[-start-210106-IB17510140-modify]//
#if GEN5_SUPPORT == 1
default = 0x9, defaultstore = MyStandardDefault,
#else
default = 0x5, defaultstore = MyStandardDefault,
#endif
//[-end-210106-IB17510140-modify]//
endnumeric;
SEPARATOR
suppressif ((PORT_INDEX == 0) OR ((PORT_INDEX == 2) AND (ideqval SETUP_VOLATILE_DATA.PlatformFlavor == FlavorMobile OR ideqval SETUP_VOLATILE_DATA.PlatformFlavor == FlavorMobileWorkstation)));
subtitle text = STRING_TOKEN(STR_CPU_PCIE_GEN5_HWEQ_CONFIG);
numeric varid = SA_SETUP.PcieRootPortGen5Uptp[PORT_INDEX],
prompt = STRING_TOKEN (STR_CPU_PCIE_UPTP_PROMPT),
help = STRING_TOKEN (STR_CPU_PCIE_UPTP_HELP),
minimum = 0,
maximum = 10,
step = 1,
default = 5,
endnumeric;
numeric varid = SA_SETUP.PcieRootPortGen5Dptp[PORT_INDEX],
prompt = STRING_TOKEN (STR_CPU_PCIE_DPTP_PROMPT),
help = STRING_TOKEN (STR_CPU_PCIE_DPTP_HELP),
minimum = 0,
maximum = 10,
step = 1,
default = 7,
endnumeric;
SEPARATOR
endif;
endform; //End of CPU_PCIERP1_OPTIONS_FORM_ID
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