365 lines
12 KiB
C
365 lines
12 KiB
C
/**@file
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@copyright
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INTEL CONFIDENTIAL
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Copyright 2009 - 2017 Intel Corporation.
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The source code contained or described herein and all documents related to the
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source code ("Material") are owned by Intel Corporation or its suppliers or
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licensors. Title to the Material remains with Intel Corporation or its suppliers
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and licensors. The Material may contain trade secrets and proprietary and
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confidential information of Intel Corporation and its suppliers and licensors,
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and is protected by worldwide copyright and trade secret laws and treaty
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provisions. No part of the Material may be used, copied, reproduced, modified,
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published, uploaded, posted, transmitted, distributed, or disclosed in any way
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without Intel's prior express written permission.
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No license under any patent, copyright, trade secret or other intellectual
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property right is granted to or conferred upon you by disclosure or delivery
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of the Materials, either expressly, by implication, inducement, estoppel or
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otherwise. Any license under such intellectual property rights must be
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express and approved by Intel in writing.
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Unless otherwise agreed by Intel in writing, you may not remove or alter
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this notice or any other notice embedded in Materials by Intel or
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Intel's suppliers or licensors in any way.
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This file contains a 'Sample Driver' and is licensed as such under the terms
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of your license agreement with Intel or your vendor. This file may be modified
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by the user, subject to the additional terms of the license agreement.
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@par Specification Reference:
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**/
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#ifndef _GENERIC_SIO_H_
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#define _GENERIC_SIO_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <Protocol/PciIo.h>
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// 51E9B4F9-555D-476c-8BB5-BD18D9A68878
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#define EFI_BOARD_SIO_PROTOCOL_GUID \
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{0x51e9b4f9,0x555d,0x476c, {0x8b, 0xb5, 0xbd, 0x18, 0xd9, 0xa6, 0x88, 0x78}}
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typedef struct _BOARD_SIO_PROTOCOL BOARD_SIO_PROTOCOL;
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typedef struct _EFI_EISAID {
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UINT32 HID;
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UINT32 UID;
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} EFI_EISAID;
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//This list migt be extended if some devices
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//not mention here present in SIO
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typedef enum {
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dsNone=0,
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dsFDC,
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dsPS2K, //PS2 Keyboard Controller if KBC on separate from MS Logical Device
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dsPS2M, //PS2 Mouse Controller if MS on separate from KBC Logical Device
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dsPS2CK,//PS2 Keyboard Controller where KBC and MS on same Logical Device
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dsPS2CM,//PS2 Mouse Controller where KBC and MS on same Logical Device
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dsUART,
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dsLPT,
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dsGAME,
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dsSB16,
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dsMPU401,
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dsFmSynth,
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dsCIR,
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dsGPIO,
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dsHwMon,
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dsPME,
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dsACPI,
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} SIO_DEV_TYPE;
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typedef EFI_STATUS (*SIO_REGISTER) (
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IN BOARD_SIO_PROTOCOL *This,
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IN BOOLEAN Write,
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IN BOOLEAN ExitCfgMode,
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IN UINT8 Register,
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IN OUT UINT8 *Value
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);
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typedef struct _T_ITEM_LIST {
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UINTN InitialCount;
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UINTN ItemCount;
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VOID **Items;
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}T_ITEM_LIST;
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typedef EFI_STATUS (*SIO_RESOURCES)(
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IN BOARD_SIO_PROTOCOL *This,
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IN BOOLEAN Set,
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IN OUT T_ITEM_LIST **Resources
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);
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//**********************************************************************
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//
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// Name: BOARD_SIO_PROTOCOL
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//
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// Description: Functions to access the SIO.
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//
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// Fields: Name Type Description
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// ------------------------------------------------------------
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//
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//**********************************************************************
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typedef struct _BOARD_SIO_PROTOCOL {
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SIO_REGISTER Access;
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SIO_RESOURCES CurrentRes;
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SIO_RESOURCES PossibleRes;
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} BOARD_SIO_PROTOCOL;
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#define PNP_HID EFI_PNP_ID
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//--------------------------------------------
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//Defines how to enter Exit config Mode
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typedef enum _SPIO_GFG_OP_TYPE{
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cfgNone=0, //Not required any sequence
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cfgByteSeq,
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cfgRoutine,
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cfgMaxCfg
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} SPIO_GFG_OP_TYPE;
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typedef VOID (*SPIO_ROUTINE) (
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VOID
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);
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typedef struct _SPIO_SCRIPT {
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BOOLEAN IdxDat; //1=IDX 0=DAT
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BOOLEAN WrRd; //1=Write 0=Read
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UINT8 Value; //if WrRd=0 wait for this data to come
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} SPIO_SCRIPT;
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typedef struct SPIO_SCRIPT_LST {
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SPIO_GFG_OP_TYPE OpType;
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UINTN InstrCount;
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VOID *Instruction[1]; // c4200
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} SPIO_SCRIPT_LST;
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//==================================================================
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//Definitions of SIO Shared Resource Flags if this flags set
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//and will share following type of resources with PREVIOUSE device
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#define SIO_SHR_NONE 0x00
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#define SIO_SHR_IO1 0x01 //device shares resources programmed in SIO_1_BASE_REG
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#define SIO_SHR_IO2 0x02 //device shares resources programmed in SIO_2_BASE_REG
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#define SIO_SHR_IO (SIO_SHR_IO1 | SIO_SHR_IO2) //device shares resources programmed in both SIO_BASE_REG
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#define SIO_SHR_IRQ1 0x04
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#define SIO_SHR_IRQ2 0x08
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#define SIO_SHR_IRQ (SIO_SHR_IRQ1 | SIO_SHR_IRQ2)
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#define SIO_SHR_DMA1 0x10
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#define SIO_SHR_DMA2 0x20
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#define SIO_SHR_DMA (SIO_SHR_DMA1 | SIO_SHR_DMA2)
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#define SIO_SHR_ALL (SIO_SHR_IO | SIO_SHR_IRQ | SIO_SHR_DMA)
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#define SIO_NO_RES 0x80 //this bit will be set if device not using any resources but must be enabled
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//at at least one call must return SUCCESS if this flag
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//all other values reserved
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#pragma pack(push,1)
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typedef struct _SIO_DEV_V_DATA {
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UINT8 DevImplemented;
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UINT16 DevBase1;
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UINT16 DevBase2;
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UINT8 DevIrq1;
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UINT8 DevIrq2;
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UINT8 DevDma1;
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UINT8 DevDma2;
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} SIO_DEV_V_DATA;
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typedef struct _SIO_DEV_NV_DATA {
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UINT8 DevEnable;
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UINT8 DevPrsId;
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UINT8 DevMode;
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} SIO_DEV_NV_DATA;
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#pragma pack(pop)
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typedef enum {
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isNone=0,
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isPrsSelect,
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isBeforeActivate,
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isAfterActivate,
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isGetSetupData,
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isMaxInitStep
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} SIO_INIT_STEP;
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//SIO Component Initialization Routine ptrototype
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typedef EFI_STATUS (*SIO_INIT)( IN BOARD_SIO_PROTOCOL *This,
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IN EFI_PCI_IO_PROTOCOL *PciIo,
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IN SIO_INIT_STEP InitStep);
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//Device table used for porting see YourSioNameDxe.c
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typedef struct _SPIO_DEV_LST {
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SIO_DEV_TYPE Type;
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UINT8 LDN; //LogicalDevice #
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UINT8 UID; //Unique ID if there are 2 or more
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//devices of the same type in this SPIO
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UINT16 PnpId;
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BOOLEAN Implemented;//Implemented on this Platform (has connector)
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BOOLEAN HasSetup; //TRUE If Device has SETUP screen and se
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UINT8 Flags; //set if Device shares all or some of it's resources
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UINT8 AslName[5]; //ASL DEVICE OBJECT NAME to look for _PRS in AML
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//if this field not 0,0,0,0 the rest of the table ignored.
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UINT16 ResBase[2]; //Base Address for SIO_1_BASE_REG and SIO_2_BASE_REG
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UINT8 ResLen[2];
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UINT16 IrqMask[2];
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UINT8 DmaMask[2];
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SIO_INIT InitRoutine;
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// UINTN SetupOffset; //offset in SIO_SETUP_VAR for this device if any
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// UINTN VolatileOffset; //offset in SIO_SETUP_VOLATILE data for this device if any
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} SPIO_DEV_LST;
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//This structure will define a multiple SIO Porting Information
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//It will be an array of such structures each of them will represent
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//a different SIO Device.
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typedef struct _SPIO_LIST_ITEM {
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//This Information is needed to identify right LPC bridge for the SIO
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// value of -1 (0xF..F) means Do not check this parameter
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UINT32 IsaVenDevId;
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UINT32 IsaSubVenId;
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UINT8 IsaBusNo;
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UINT8 IsaDevNo;
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UINT8 IsaFuncNo;
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// //This is the information Needed Get Sio Setup Data
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// //----------------------------------------
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// UINT16 *SetupVarName;
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// UINT16 *VolatileVarName;
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// EFI_GUID *SioVarGuid;
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// //This is the information Needed to access SIO Generic Registers
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// //----------------------------------------
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UINT16 SioIndex;
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UINT16 SioData;
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// Dev Select and Activate
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UINT8 DevSel;
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UINT8 Activate;
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UINT8 ActivVal;
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UINT8 DeactVal;
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//Generic registers location
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UINT8 Base1Hi;
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UINT8 Base1Lo;
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UINT8 Base2Hi;
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UINT8 Base2Lo;
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UINT8 Irq1;
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UINT8 Irq2;
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UINT8 Dma1;
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UINT8 Dma2;
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//List of devices inside this SIO
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UINTN DevCount;
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SPIO_DEV_LST *SioDevList;
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//List of valid registers inside SIO to check if they has to be saved
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//----------------------------------------
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//in BOOT_SCRIPT_SAVE for S3 state Resume
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//This is for global registers which are the same for all devices in SIO
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UINTN GlobalInclRegCount;
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UINT8 *GlobalIncludeReg; //Buffer will be located in GSPIO structure
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//This is for Local registers they are unique for each device in SIO
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UINTN LocalInclRegCount;
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UINT8 *LocalIncludeReg; //Buffer will be located in SIO_DEV structure
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//----------------------------------------
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//How To enter/exit Configuration mode if any
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SPIO_SCRIPT_LST *EnterCfgMode;
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SPIO_SCRIPT_LST *ExitCfgMode;
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}SPIO_LIST_ITEM;
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typedef struct _GSPIO GSPIO;
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//SPIO Device Private Data section
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typedef struct _SPIO_DEV {
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BOARD_SIO_PROTOCOL BoardSio;
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EFI_DEVICE_PATH_PROTOCOL *DevicePath;
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EFI_HANDLE Handle;
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// BOOLEAN Implemented; //Present in SPIO_DEV.DeviceInfo;
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BOOLEAN Started;
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BOOLEAN Assigned;
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BOOLEAN Initialized;
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BOOLEAN IrqReserved;
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// UINT8 LDN; //Present in SPIO_DEV.DeviceInfo;
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UINT8 Reserved;
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// UINTN Flags; //Present in SPIO_DEV.DeviceInfo;
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struct _SPIO_DEV *ResOwner;
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struct _SPIO_DEV *ResConsumer;
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// SIO_DEV_TYPE Type; //Present in SPIO_DEV.DeviceInfo;
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EFI_EISAID EisaId;
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T_ITEM_LIST CRS;
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T_ITEM_LIST PRS;
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//SIO_INIT InitRoutine; //Present in SPIO_DEV.DeviceInfo;
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//we will need it to generate boot script for s3 resume
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UINT8 *LocalCfgDump;
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GSPIO *Owner;
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SPIO_DEV_LST *DeviceInfo;
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SIO_DEV_NV_DATA NvData;
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SIO_DEV_V_DATA VlData;
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EFI_HANDLE ImageHandle;
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} SPIO_DEV;
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//Global Super IO device Private Structure
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typedef struct _GSPIO {
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//UINT16 Indx;
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//UINT16 Data;
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// EFI_HANDLE ImageHandle; don't need it
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EFI_HANDLE CntrHandle;
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EFI_HANDLE SupportedHandle; //
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EFI_DEVICE_PATH_PROTOCOL *CntrDevPath;
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EFI_PCI_IO_PROTOCOL *IsaBrgPciIo;
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BOOLEAN InCfgMode;
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UINTN DeviceCount;
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SPIO_DEV **DeviceList;
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//we will need it to generate boot script for s3 resume
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UINT8 *GlobalCfgDump;
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SPIO_LIST_ITEM *SpioInfo;
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} GSPIO;
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#define SIO_DEV_STATUS_VAR_NAME L"SIO_DEV_STATUS_VAR"
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#define SIO_DEV_STATUS_VAR_GUID \
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{0x5820de98, 0xfc8e, 0x4b0b, 0xa4, 0xb9, 0xa, 0x94, 0xd, 0x16, 0x2a, 0x7e}
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//
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// Bit values of various SIO devices defined in SIO_DEV_STATUS
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//
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#define SIO_DEV_COM1 0x0001
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#define SIO_DEV_COM2 0x0002
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#define SIO_DEV_LPT 0x0004
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#define SIO_DEV_FDC 0x0008
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#define SIO_DEV_SB16 0x0010
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#define SIO_DEV_MIDI 0x0020
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#define SIO_DEV_MSSAUDIO 0x0040
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#define SIO_DEV_FMSYNTH 0x0080
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#define SIO_DEV_GAME1 0x0100
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#define SIO_DEV_GAME2 0x0200
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#define SIO_DEV_KBC 0x0400
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#define SIO_DEV_EC 0x0800
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#define SIO_DEV_COM3 0x1000
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#define SIO_DEV_COM4 0x2000
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#define SIO_DEV_PS2MS 0x4000
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typedef union {
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UINT16 DEV_STATUS;
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struct {
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UINT16 SerialA : 1; //bit 0 - Serial A
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UINT16 SerialB : 1; //bit 1 - Serial B
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UINT16 Lpt : 1; //bit 2 - LPT
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UINT16 Fdd : 1; //bit 3 - FDD
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UINT16 Sb16 : 1; //bit 4 - SB16 Audio
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UINT16 Midi : 1; //bit 5 - MIDI
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UINT16 MssAudio : 1; //bit 6 - MSS Audio
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UINT16 FmSynth : 1; //bit 7 - AdLib sound (FM synth)
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UINT16 Game1 : 1; //bit 8 - Game port #1
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UINT16 Game2 : 1; //bit 9 - Game port #2
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UINT16 Key60_64 : 1; //bit a - KBC
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UINT16 Ec62_66 : 1; //bit b - EC
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UINT16 SerialC : 1; //bit c - Reserved
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UINT16 SerialD : 1; //bit d - Reserved
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UINT16 Ps2Mouse : 1; //bit e - PS/2 Mouse
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UINT16 Res3 : 1; //bit f - Reserved
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} DEV_FIELD;
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} SIO_DEV_STATUS;
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/****** DO NOT WRITE BELOW THIS LINE *******/
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#ifdef __cplusplus
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}
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#endif
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#endif
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